This application claims the priority of German Patent Application Serial No. 101 24 197.6, filed May 17, 2001, pursuant to 35 U.S.C. 119(a)-(d), the subject matter of which is incorporated herein by reference.
The present invention relates, in general, to an inverter with line-side and load-side self-commutated pulse converters, and more particularly, to an inverter with a pulse converter that operates efficiently at different pulse frequencies on the line side and the load side.
FIG. 1A is a schematic circuit diagram of a conventional commercially available inverter. The depicted converter 2 includes self-commutated pulse converters on the line side 4 and the load side 6, which are electrically connected to one another through a DC intermediate circuit 8. A line filter 12 is connected between the power mains 10 and the AC terminals of the line-side self-commutated pulse converter 4. The line filter 12 on the line side becomes smaller and less expensive with increasing pulse frequency (operating frequency) fpN of the self-commutated pulse converter 4. A load 14 is connected to the AC terminals of the load-side self-commutated pulse converter 6. The line-side self-commutated pulse converter 4 is controlled so that the line current iN has a low harmonic content. The residual harmonics are filtered by the line filter 12. FIG. 1B shows the line current iN, the line voltage uN and the input voltage uE of the line-side self-commutated pulse converter 4 for one phase during a line voltage period. The line-side pulse converter 4 can also be controlled to return energy to the mains 10. The load-side self-commutated pulse converter 6 is controlled so as to generate an AC voltage with an adjustable amplitude and frequency from the constant DC voltage UZ that is applied to each phase to the input of converter 6. FIG. 1C shows the load current iL, the output voltage uL and the voltage uLG of the corresponding fundamental oscillation over one period of the converter 6. The current valves 16 and 18 on both the line side 4 and the load side 6 of the depicted conventional self-commutated pulse converters are hereinafter referred to as disconnectable or gate-turn-off insulated-gate bipolar transistors (IGBT), with the term disconnectable and gate-turn-off being used synonymously.
The conventional inverter 2, which is suitable for different line conditions and/or can tolerate reverse voltages, has typically a line frequency fN that is substantially identical to the output frequency fU. In a well-designed self-commutated current converter 6 on the load side, the ratio between the pulse frequency fpL and the output frequency fU should not be smaller than a predetermined value. For example, the Siemens catalog DA 65.10-2000 entitled xe2x80x9cSimovert Masterdrives Vector Controlxe2x80x9d lists in the diagram xe2x80x9cReduction Curves for the Motor-Side Inverterxe2x80x9d in normal operation a pulse frequency fpL of, for example, 6 kHz which can be increased to a maximum pulse frequency pLmax=16 kHz. However, when the pulse frequency fpL is increased to 16 kHz, the current rating is degraded by 50%, which also degrades by 50% the power available from the converter. The exemplary pulse frequency fpL=6 kHz is also used for the line-side self-commutated pulse converter 4 of the inverter 2, although half the pulse frequency fpN would still be sufficient. This unnecessarily increases the cost of the line-side pulse converter 4.
If the two self-commutated pulse converters 4 and 6 of the inverter 2 are both designed for the same lower pulse frequency fpN of the line-side self-commutated pulse converter 4, then the load-side pulse converter 6 which requires a pulse frequency fpL=6 kHz would not be able to operate under full load. The diagram in the above-referenced Siemens catalog shows that the rated current at a pulse frequency fp=6 kHz is reduced by 25% in comparison to the current at a nominal pulse frequency of 3 kHz. At least the load-side self-commutated pulse converter 6 would have to be oversized, increasing its cost.
It would therefore be desirable and advantageous to provide an improved inverter to obviate prior art shortcomings.
According to one aspect of the invention, an inverter includes a first self-commutated pulse converter having an AC input side connected to a power mains and a DC output side, said first converter comprising first disconnectable converter valves of a first circuit topology and implemented as semiconductor switches operating at a first pulse frequency; at least one second self-commutated pulse converter having a DC input side and an AC output side connected to a load, said at least one second converter comprising second disconnectable converter valves of a second circuit topology and implemented as semiconductor switches operating at a second pulse frequency different from the first pulse frequency; and a DC intermediate circuit electrically connecting the DC output side of the first converter to the DC input side of the at least one second converter.
By no longer using the same semiconductor switches as disconnectable current rectifier valves of the line side and load side, the pulse converters can be optimized for the desired operating frequencies which can be considerably different. In this way, the pulse converter of the inverter can be adapted to the required pulse frequencies simply by changing the power components while staying within the same power class. This approach not only reduces cost, but also saves space.
According to one embodiment, the inverter has at least two load-side self-commutated pulse converters, which are connected to a common DC intermediate circuit, wherein each of the load-side pulse converters has different semiconductor switches that operate as disconnectable current rectifier valves and can be matched to the loads to be powered. The pulse frequencies (fpL) of the at least two load-side self-commutated pulse converters can be multiples of one another.
The different semiconductor switches for the disconnectable current rectifier valves of the line-side and load-side pulse converters are advantageously selected so that the semiconductor switches used at a high pulse frequency are optimized for small switching losses and the semiconductor switches used at a low pulse frequency are optimized for small forward losses.
According to yet another advantageous embodiment, the disconnectable converter valves of the self-commutated pulse converters are insulated gate bipolar transistors and self-blocking field-effect transistors and/or cascode circuit elements. For example, if the line-side current converter uses insulated gate bipolar transistor, the load-side converter employs self-blocking field-effect transistors or cascode circuit elements, and vice versa.
According to another embodiment, a decoupling diode with a low forward voltage is connected in series with each self-blocking field-effect transistor, and a free-wheeling diode for high pulse frequencies is connected antiparallel with the series connection, i.e., the free-wheeling diode is biased in the opposite direction of the decoupling diode. Alternatively, the cascode circuit element includes a self-blocking MOSFET and a self-conducting JFET which are connected as a cascode, with a free-wheeling diode connected antiparallel to the cascode, i.e., the free-wheeling diode is biased in the opposite direction of the cascode configuration.